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【实习】NVIDIA上海急招DFT Intern

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发表于 2014-6-9 16:13:55 | 显示全部楼层 |阅读模式
亲爱的小伙伴们,
NVIDIA上海又开始实习生招聘啦!该职位如果表现好,很有可能会转正!有兴趣的童鞋请将中英文简历发至:sasu@nvidia.com
邮件标题请注明:姓名-职位-毕业时间-一周实习天数-实习周期 (例:张三-DFT Intern-2015.4-一周三天-六个月)

RESPONSIBILITIES:
- Responsible for DFT feature and VerifPlan setup.
- DFT area work include Jtag ,SCAN, Boundary SCAN, MBIST and Analog.
- Develop test DFT cases and procedure.
- Responsible to use and maintain dft and verification flow.
- Generate test vectors and post silicon validation.

MINIMUM REQUIREMENTS:
- BSEE, MSEE is preferred.
- Strong logic design and verification back ground.
- Possess knowledge of DFT (scan insertion, Mbist, JTAG and etc.).
- Skilled in Perl/tcl, programming.
- Working knowledge in C/C++, makefile is a plus.
- Prefer to have experience in logic simulators and debug tools (vcs, ncsim, verdi and etc.).
- Prefer in verilog HDL.
- Problem solving and analytical skills.
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