【Marvell招聘】Digital Design and Verification Engineer

hwangbo

Job Title: Digital Design and Verification Engineer
Location: Shanghai

Description:
In this position, the candidate will be working with Marvell Audio Processor and Codec product line. The candidate will be responsible for developing blocks/IP, interface modules and datapath RTL in audio processors and audio codec products. The candidate will be working closely with DSP architecture team, where he/she will be responsible for taking design specifications to RTL. The candidate will also be responsible for developing test environment for the developed block. The candidate should have excellent RTL design and verification skills.

Qualifications:
MSEE with 5+ years of experience or PhD with solid academic background in the following area：
•Micro-architecture development and Verilog RTL coding
•Strong knowledge of Datapath design
•Strong knowledge of control and FSM design
•Strong knowledge of various test methodologies such as UVM/VVM/OVM. Experience in developing functional coverage, assertions and directed/random tests
•Strong knowledge of Verilog test bench development
•Strong understanding and experience in serial and parallel interface design
•Solid background in mixed signal and low power design methodologies
•Good understanding of ASIC implementation flow – timing constraints, synthesis (DC), timing closure (PT/PTSI) and formal verification
•Excellent communication and documentation skills

The following skills are a plus
- Knowledge of Matlab, C, Perl and TCL
- Knowledge of System Verilog
- Experience with ARM architecture
- Experience with filter design and other signal processing tasks

If you are interested in any one of the four positions, please send your resume to the following email address:   linluo@marvell.com
Subject of your email should be: School_Name_Applied position_Information source
Eg.SJTU_Zhang Peng _Data Analyst_BBS