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Job Title: Engineer, Senior ASIC Design
Location: Beijing/Shanghai
Job Description:
As a Digital design engineer, he/she will contribute to the overall SoC development and IP development for the micron-controller oriented SoC Product line, which includes block level micron-architecture design, RTL coding, Simulation, SoC top level integration, verification and chip bring-up.
Qualification:
-BS degree in Electrical Engineering +5 years experience (or MS + 3 years) or equivalent in hardware development and system architecture.
-Familiar with ASIC design methodologies and flows.
-Experience in the usage of state-of-the-art design tools.
-Proficient in behavioral and RTL coding, Verification. Verilog is preferred
-Experience in logic synthesis, timing closure.
-Experience in Design For Test.
-Knowledge of Low Power architecture and design practice is desirable.
-Strong verbal and written communication skills and proactive team-work spirit.
-Working understanding of various system interconnect protocols such as: AHB, AXI, OCP, APB, and their impact on IP development.
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If you are interested in exploring a job opportunity with Marvell
please send me a copy of your resume to: marvell.resume@gmail.com
Email Subject: 姓名_学历_学校_工作年限_应聘岗位_意向城市; 比如: 张三_硕士_东南大学_3yrs_Platform_南京
更多关注:
Marvell官方微博:http://e.weibo.com/marvellcn
Marvellhr官方微博: http://weibo.com/marvellhr
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