AMD最新招聘职位-内部推荐

jolin821

本人为AMD员工，职位是ASIC设计验证，有找工作或想跳槽的朋友可以把你们的简历发到我的邮箱
邮箱1:[email]liujing_821@hotmail.com[email];

邮箱2：[email]Jane2.Jin@amd.com[email]。

两个都发一下，以便能及时收到。
以下是最新的招聘职位和需求:
有 ASIC design 和验证， software 和 hardware， FAE QA等，由于帖子字数的限制，写不下所有的职位及要求，请看附件
Title: MTS/SMTS Electrical Analysis and Debug Location: Shanghai #1
 JOB DESCRIPTION:
Processor silicon DDR interface electrical test and debug engineer in the Shan
ghai Research & Development Design Center. In this role, this senior level eng
ineer will be part of a highly technical team that develops test plans, execut
es bring-up & test plans, & debugs electrical issues in the memory sub-system
of new processors. The job entails extensive hands-on lab work as well as tech
nical leadership and communication across teams.
 SPECIFIC JOB FUNCTIONS:
1) Provides DDR technical leadership in the development of new test & validati
on features
2) Closely interacts with silicon design (DRAM controller and phy) in test exe
cution & debug, as well as in feature definition for future product generation
3) Writes comprehensive electrical & functional test plans for the memory vali
dation of processors
4) Executes electrical & functional test plans for AMD processors using hardwa
re & software validation tools, oscilloscopes, & logic analyzers. 5) Debug of
electrical & functional issues of the memory sub-system of new processors
6) Provides detailed input into the platform definition & review of platform d
esigns used in the silicon validation of new processors. 7) Provides technical
guidance and training to less experienced engineers and technicians in the pl
anning, test, & debug of the memory sub-system.
 SKILLS REQUIRED:
1) BS-EE / BS-CE with at least 10 years directly related experience. An advanc
ed degree will be considered a plus. 2) Requires experience and demonstrated t
echnical expertise in the development & execution of platform level electrical
& functional test plans. DDR2/3 Memory test experience on electronic componen
ts such as Processors would be considered a big plus. 3) Requires extensive ha
nds-on experience and demonstrated technical expertise in the debug of I/O int
erfaces such as DDR 4) Demonstrated experience with or knowledge using oscillo
scopes, reading schematics and layout documentation
5) Requires good written and oral communication skills.
6) Demonstrated ability to communicate with a variety of engineering disciplin
es and management.
https://amd.apply2jobs.com/index ... mp;RID=9593&Cur
rentPage=1
Title: SMTS/MTS for Hardware/Platform Design Engineer Location: Shanghai #1
 JOB DESCRIPTION:
Technical leader responsible for graphic, motherboard, and system design in ou
r Shanghai Research and Development Center (SRDC). Systems are integrated comb
inations of hardware components (CPUs, graphics, memory, IO adapters, peripher
als, and BMCs) and software components (firmware, drivers, OS, virtualization,
and system management). This individual will interface with the Marketing, Si
licon design, Software, and Validation teams to define our platforms for new s
ilicon, provide detailed technical direction to the SRDC engineers to draw sch
ematics, layout the board, develop the System BOM, bring up, debug issues, and
complete Motherboard QA testing.
 SPECIFIC JOB FUNCTIONS:
1) Motherboard and system specification, negotiate features with input teams a
nd silicon designers
2) Schematic capture and guide layout of motherboards for new silicon
3) Feedback and refine design rules with simulation and silicon design teams
4) Bring up and validate motherboard and systems
5) Negotiate solid solutions to technical issues and design challenges
6) Ensure all processes are met in development
7) Contribute to client system development processes, team development, tool d
evelopment
8) Support silicon validation, characterization, and debug of existing and new
microprocessor and chip-set products
9) Project planning, status tracking, and reporting to senior management
 SKILLS REQUIRED:
1) Excellent communication skills
2) Prior experience with software testing tools and environments, defect track
ing, and revision control
3) Familiar with Microsoft Client Operating Systems, Linux Operating Systems,
virtualization software (VMware, Xen, et al), and validation/certification pro
cesses for each of these environments
4) Familiar with client system component compatibility and stress testing
5) Familiar with high performance client IO adapters, drivers, and stress test
ing
6) Familiar with general Computer Architecture concepts
7) Skilled in Cadence Concept schematic capture
 SKILLS PREFERRED:
1) Familiar with Cadence Allegro layout tools
2) Familiar with MS Office & MS Project tool suites
3) Familiar with microprocessor bring-up and debug
4) Familiar with C/C++, JAVA, and scripting language programming
 PREFERRED EDUCATION AND EXPERIENCE:
A Bachelor's and/or Master's degree in Computer Science or Computer Engineerin
g. Requires 10-20 years experience leading computer system development.
https://amd.apply2jobs.com/index ... mp;RID=9595&Cur
rentPage=1
Title: MTS-SMTS Thermal Mechanical Engineer Location: Shanghai #1
 JOB DESCRIPTION:
This position will be responsible for thermal and mechanical engineering in su
pport and development of discrete graphics, graphics cards, CPUs, and chipsets
in AMD Shanghai Research and Development Center (SRDC). The position is for a
n experienced engineer that will perform hands-on engineering with local board
engineering teams in SRDC, suppliers/partners in the thermal management field
in the Far East, and interface with other AMD engineering and development org
anizations in various locations – Toronto, Canada; Austin, Texas, Sunnyvale,
CA, Singapore, and others.