[Marvell]各部门紧急招聘

hwangbo

[Marvell]各部门紧急招聘
If you have any interest in the position, please send your bilingual resume as attachments to  marvell.recruit@gmail.com Subject of your email should be “Your Name_University_Applied Position Title_Applied working location”


部门：APSE部门
职位：Build and Release Engineer
工作地点：上海-浦东新区
Job Description
•Responsible for software build, integration and release management for on-time delivery of software releases
•Constantly seek to setup and improve SW integration and release processes in company’s process
•Maintain the build and release infrastructure
•Support customer projects, regarding software and patch release
•Training to internal and external customers may be required

Job Requirement
•Good experience and understanding on software design, development, release and maintenance processes
•Good understanding on mobile phone software architecture and system concepts are preferred ,
•Proficient Python/PERL/Shell scripting skills
•Proficient in Make file
• Knowledge on Android system, GIT/SVN is a plus
• Self-motivate, responsible and work under pressure

Qualifications and Skills
•BSc. MSc in computer science or other relevant area.
•Good teamwork and communication skills
•Fluent English is a must.

Experience
•+3 years work experience in SW build and release or related areas


部门：CTO部门
Position 1: Software Intern for embedded system（实习生）[上海-浦东新区]
Department: Embedded System Group - CTO Office

Job Description:
- Implement application-layer and network layer protocols according to given standards
- Define and implement API interfaces between layers and between network stacks and user application
- Participate/Support team members working on lower layers.
- Support QA team to bring-up test software

Requirements:
- Bachelors Degree in Computer Science or equivalent, M.S. preferred
- Been through a full-life cycle of software product
-Good understanding on software development with RTOS
- Hands-on experience on compilers, toolchains, and debuggers (JTAG/ICE) for embedded software development
- Solid experience on application development (C++ or Java) and SDKs (Visual studio/GNU)
-Familiar with source version control (Subversion/Perforce)
-Good communication skills in verbal and written English
- Willing to learn, self-starter
Plus:
-Familiar with TCP/IP network stack
- Solid experience on device driver, TCP/UDP socket programming and GUI development (Windows/Linux)
- Familiar with at least one script language (Perl, Python, Shell)
- Experience on software development with embedded ARM platform.
- Experience on software development for low-power system.
- Experience software development for wireless network and related protocols/standards
-Hands-on experience in logic analyzer, oscilloscope, network protocol analyzer, and packet sniffer

Position 2: Embedded System QA Intern （实习生）[上海-浦东新区]
Department: Embedded System Group - CTO Office

Responsibility:
- Develop test plans according to given project schedule
- Design test cases according to given product requirements or network standards
- Development and maintain automated test software
- Design and deploy test environment including both hardware and software
- Support development team by providing remote access to test scenario and detailed report on found defects

Requirements:
- Bachelors Degree in Computer Science or equivalent, M.S. preferred
- Familiar with test planning and test case design
- Familiar with TCP/IP network stack
- Solid experience on device driver, TCP/UDP socket programming and GUI development (Windows/Linux)
- Solid experience on application development (C++ or Java) and SDKs (Visual studio/GNU)
- Familiar with at least one script language (Perl, Python, Shell)
- Familiar with SCM tools (Subversion/Perforce) and build automation software
- Good communication skills in verbal and written English
- Willing to learn, self-starter
Plus:
- Experience on building and leading a team
- Experience with embedded system, RTOS, and low-power system.
- Experience with wireless network and related protocols/standards
- Experience in logic analyzer, oscilloscope, network protocol analyzer, and packet sniffer
- Familiar with web interface design and deployment such as LAMP

Position 3 : Software engineer – AGPS network Engineer
Must:
1.计算机、自动化、电子及其相关专业硕士及以上学位学位或工作三年以上的学士;
2.2年以上网络开发经验，熟悉WindowsServer /Apache,精通TCP/IP开发，熟练掌握C/C++ , Socket, Network 编程.
3.精通数据库及其开发。
4.熟悉SUPL协议;
5.良好的英语书面表达，会话与交流能力
Nice to have:
1.了解AGPS/EE/Xtra 服务器端.
2.了解  SUPL 1.0/2.0/RRLP/RRC/LTE and LPP
3.了解GPS信号与原理.
Responsibility：
1.负责AGPS服务器端架构建立与开发;
2.负责服务器端数据库建立与开发。
3.开发Server/Client 程序与测试工具.
4.支持AGPS验证开发。

Position 4:  Software engineer -- Hybrid Positioning
Job Description:
1. 研发，优化和开发定位算法与软件
2. 为手机，平板电脑等消费电子产品提供精准无缝的定位解决方案。
3. 研发于无线信号相关（WIFI/BlueTooth/Cell等）定位算法
4. 研发微传感器定位（MEMS include Gyro/Acc/Barometer/G-sen/ etc）算法
Must ：
1.计算机、通信、电子及其相关专业硕士学位或工作两年以上的学士；
2.有2年以上基站/wifi定位、传感器定位等相关项目软件开发经历；
3.熟练掌握定位的基础理论和方法，精通数据处理及融合技术；
4.熟悉无线及混合定位当前热点和前沿技术，并对其原理与应用场合有完整的、系统的认识
5.熟练的计算机编程能力，较强的算法和数据结构基础；
6.良好的英文读写水平，论文阅读和总结，新技术学习能力；
7.良好的合作精神和沟通能力，项目推动和跨部门沟通能力。
Nice to have：
1.了解GPS/GNSS 定位技术与经验；
2.具备嵌入式系统开发经验,了解网络编程及服务器端开发， 以及数据库开发。



部门：COT-common lab 部门
1、Job Title : (Senior) Circuit Design Engineer
Department :COT Common Lab
Location  : Shanghai
Job Description
Design, evaluate, and improve standard cell library architectures for tradeoffs in size, speed, density and yield for targeted applications. Investigate advanced technology layout dependent effects and their impact on performance for high speed library design.
The candidate will help bring up local transistor level layout team that will concentrate on realizing circuit design and technology trade-offs for library performance improvement.  They will have close interaction and supervision of the layout designers to meet desired design parameters.

Qualifications
-BSEE with more than 5 years of experience or MSEE with 3 or more years of experience, in standard cell circuit design or relevant industrial experience.  
-The candidate should be well versed in Hspice or equivalent circuit simulation as well as full custom design layout software.  
-Experience in cutting edge technology nodes 32nm and below a plus.  
-Excellent Perl and Unix shell scripting skills for design automation and analysis are required.
-Looking for a disciplined and methodical worker with a creative and inquiring mindset.  
-The applicant should have clear English written and verbal communication skills.  
-Management lead experience a plus.

2、Job Title:  (Senior) Layout Design Engineer
Department: COT Common Lab
Location:   Shanghai
Job Description:
Improve standard cell library layout architectures for tradeoffs in size, speed, density and yield for targeted applications.  The designer will be working on cutting edge process nodes, helping review locally generated layouts for efficient implementation before release to central team.  The designer should have a clear understanding of standard cell layout constraints and be able to drive trade-offs and new rule creation.
The candidate will be working closely with circuit design to help optimize standard cells, and complete libraries, to take advantage of cutting edge layout dependent effects to improve the overall library performance.

Qualifications:
-BSEE with more than 5 years of experience or MSEE with 3 or more years of experience
-Standard cell layout expertise with 3 or more years of relevant industrial experience.  
-Cutting edge, 32nm and below technology node experience a plus.  
-The candidate should be proficient with transistor level layout and related tools such as Cadence Virtuoso or Springsoft Laker, as well as Calibre DRC/LVS or equivalent tool set.  
-They should have experience running the complete layout design flow including schematic to layout generation, DRC, LVS, ERC and DFM verification and validation.  
-Experience in parasitic extraction a plus.
-Looking for a disciplined and methodical worker with a creative and inquiring mindset.  
-The applicant should have clear English written and verbal communication skills.  
-Lead experience a plus.

hwangbo

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hwangbo

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