NXP招聘IC Backend实习生

freescalehr

IC Backend Design Engineer Intern
Location: Shanghai
Responsibilities:

-        Work with the global design team to do complex SOC physical implementation for deep submicro design.
-        Participates in chip level and block level backend design for complex SOC designs.
-        Responsible for RTL to GDS flow including CPF definition, logic/physical synthesis, die size estimation, floor-planning, power planning, CTS, place and route, STA, signal integrity, timing closure, formal verification, DFM, DRC/LVS etc.

Requirements:
-        University degree in microelectronics engineering or equivalent, master degree or above is preferred;
-        Relevant Experience in floor-planning, power planning, place and route, STA, IR drop and signal integrity, DRC/LVS;
-        Good understanding on soc backend flow and process, special for partition flow;
-        Good communication skills is must, English language proficiency.

请将简历直接发至juno.tang@nxp.com