【实习】恩智浦半导体-IC Design Methodology Intern(可留用)

NXPtalent

【实习】恩智浦半导体-IC Design Methodology Intern(可留用)
SoC Design或者Software背景的同学均可申请
If interested, send your CV to elena.tu@nxp.com, specifying the position you’re applying to.
Organization:
NXP Semiconductors enables secure connections and infrastructure for a smarter world, advancing solutions that make lives easier, better and safer. As the world leader in secure connectivity solutions for embedded applications, NXP is driving innovation in the secure connected vehicle, end-to-end security & privacy and smart connected solutions markets. Built on more than 60 years of combined experience and expertise, the company has 45,000 employees in more than 35 countries.
Responsibilities:
-        Responsible for NXP global design flow and methodology development.
-        Major on physical design flow and methodology development including advanced design technology development.  
-        Responsible for power methodology development especially in low power, IR drop etc
-        Layout integration, DRC/LVS and final GDS tape out service
-        Responsible for NXP differentiated tool/flow scripts development.

Requirements:
-        Bachelors or Master Degree or University Degree or equivalent from Electronic, Electrical or Computer Science.
-        Well communication and Inter-person skill.
-        Good language skill in English, Pass CET-6.
-        Good knowledge in software development, C/C++, TCL/TK, Perl/Python is a big plus
-        Have knowledge about EDA simulation and synthesis tool as well as VLSI design flow.
-        Have used EDA tool from Cadence, Synopsis, Mentor digital and/or analog developing